通信工程文献翻译——功能特性描述

AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K 在系统可编程Flash 存储器。使用Atmel 公司高密度非易失性存储器技术制造，与工业80C51 产品指令和引脚完全兼容。片上Flash允许程序存储器在系统可编程，亦适于常规编程器。在单芯片上，拥有强大功能的8 位CPU 和系统可编程Flash，使得AT89S52为众多嵌入式控制应用系统提供灵活、高效率的解决方案。AT89S52具有以下标准功能：8k字节Flash，256字节RAM，32位I/O 总线，看门狗定时器，2个数据指针，三个16位定时器/计数器，一个6向量2级中断结构，全双工串行口，片内晶振及时钟电路。另外，AT89S52可降至0Hz 静态逻辑操作，支持2种软件可选择节电模式。空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。掉电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。

引脚说明

VCC ：电源；GND：地。

P0 口：P0口是一个8位漏极开路的双向I/O口。作为输出口，每位能驱动8个TTL逻辑电平。对P0端口写“1”时，引脚用作高阻抗输入。当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。在这种模式下，P0具有内部上拉电阻。在flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。程序校验时，需要外接上拉电阻。

P1 口：P1口是一个具有内部上拉电阻的8 位双向I/O 口，P1 输出缓冲器能驱动4 个TTL 逻辑电平。对P1 端口写“1”时，它们被内部的上拉电阻拉升为高电平，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。此外，P1.0和P1.2分别作定时器/计数器2的外部计数输入（P1.0/T2）和定时器/计数器2的触发输入（P1.1/T2EX）。在flash编程和校验时，P1口接收低8位地址字节。

P2 口：P2口是一个具有内部上拉电阻的8 位双向I/O 口，P2输出缓冲器能驱动4个TTL逻辑电平。对P2端口写“1”时，它们被内部的上拉电阻拉升为高电平，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。在访问外部程序存储器或用16位地址读取外部数据存储器（例如执行MOVX @DPTR）时，P2 口送出高八位地址。在这种应用中，P2口使用内部上拉电阻发送1。在使用8位地址（如MOVX @RI）访问外部数据存储器时，P2口输出P2锁存器的内容。在flash编程和校验时，P2口也接收高8位地址字节和一些控制信号。

P3 口：P3口是一个具有内部上拉电阻的8位双向......

Description

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8Kbytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the programmemory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,and clock circuitry. In addition, the AT89S52 is designed with static logic for operationdown to zero frequency and supports two software selectable power saving modes.The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, andinterrupt system to continue functioning. The Power-down mode saves the RAM contentsbut freezes the oscillator, disabling all other chip functions until the next interruptor hardware reset.

Pin Description

VCC:Supply voltage. GND:Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as high impedance inputs.Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification.External pullups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition